diff --git a/doc/02_user/integration.rst b/doc/02_user/integration.rst
index 0d71dcb9ac..78ae5f5a51 100644
--- a/doc/02_user/integration.rst
+++ b/doc/02_user/integration.rst
@@ -410,6 +410,9 @@ Interfaces
 | ``debug_*``                  | Debug interface, see :ref:`debug-support`                              |
 +------------------------------+------------------------------------------------------------------------+
 | ``crash_dump_o``             | A set of signals that can be captured on reset to aid crash debugging. |
+|                              | The ``current_pc`` and ``next_pc`` fields are only guaranteed to be    |
+|                              | defined after reset if ``SecureIbex`` and thereby ``ResetAll`` is      |
+|                              | enabled.                                                               |
 +------------------------------+------------------------------------------------------------------------+
 | ``double_fault_seen_o``      | A double fault was observed, see :ref:`double-fault-detect`            |
 +------------------------------+-------------------------+-----+----------------------------------------+
diff --git a/rtl/ibex_top.sv b/rtl/ibex_top.sv
index 2526977e0f..dcd57d9cc7 100644
--- a/rtl/ibex_top.sv
+++ b/rtl/ibex_top.sv
@@ -1385,11 +1385,21 @@ module ibex_top import ibex_pkg::*; import ibex_cheriot_pkg::*; #(
   `ASSERT_KNOWN(IbexAlertMajorInternalX, alert_major_internal_o)
   `ASSERT_KNOWN(IbexAlertMajorBusX, alert_major_bus_o)
   `ASSERT_KNOWN(IbexCoreSleepX, core_sleep_o)
+  `ASSERT_KNOWN(IbexRamCfgIcacheTagOX, ram_cfg_icache_tag_o)
+  `ASSERT_KNOWN(IbexRamCfgIcacheDataOX, ram_cfg_icache_data_o)
+  `ASSERT_KNOWN(IbexLockstepCmpEnX, lockstep_cmp_en_o)
+  `ASSERT_KNOWN(IbexDataReqShadowX, data_req_shadow_o)
+  `ASSERT_KNOWN_IF(IbexDataReqShadowPayloadX,
+    {data_we_shadow_o, data_be_shadow_o, data_addr_shadow_o,
+     data_wdata_shadow_o, data_wdata_intg_shadow_o}, data_req_shadow_o)
+  `ASSERT_KNOWN(IbexInstrReqShadowX, instr_req_shadow_o)
+  `ASSERT_KNOWN_IF(IbexInstrReqShadowPayloadX, instr_addr_shadow_o, instr_req_shadow_o)
 
   // X check for top-level inputs
   `ASSERT_KNOWN(IbexTestEnX, test_en_i)
   `ASSERT_KNOWN(IbexRamCfgTagX, ram_cfg_icache_tag_i)
   `ASSERT_KNOWN(IbexRamCfgDataX, ram_cfg_icache_data_i)
+  `ASSERT_KNOWN(IbexCHERIoTEnableX, cheriot_enable_i)
   `ASSERT_KNOWN(IbexHartIdX, hart_id_i)
   `ASSERT_KNOWN(IbexBootAddrX, boot_addr_i)
   `ASSERT_KNOWN(IbexTrvkHeapBaseAddrX, trvk_heap_base_addr_i)
@@ -1407,6 +1417,11 @@ module ibex_top import ibex_pkg::*; import ibex_cheriot_pkg::*; #(
   `ASSERT_KNOWN_IF(IbexTrvkRevbmRPayloadX,
     {trvk_revbm_rdata_i, trvk_revbm_rdata_intg_i, trvk_revbm_err_i}, trvk_revbm_rvalid_i)
 
+  // Crash dump depends on FFs that are only defined at reset if the ResetAll flag is set
+  if (ResetAll) begin : g_reset_all_ibex_assert_known
+    `ASSERT_KNOWN(IbexCrashDumpX, crash_dump_o)
+  end
+
   `ifdef INC_ASSERT
     typedef struct packed {
       logic valid;
@@ -1575,6 +1590,7 @@ module ibex_top import ibex_pkg::*; import ibex_cheriot_pkg::*; #(
 
   `ASSERT_KNOWN(IbexDebugReqX, debug_req_i)
   `ASSERT_KNOWN(IbexFetchEnableX, fetch_enable_i)
+  `ASSERT_KNOWN(IbexMcounterEnableWritableX, mcounteren_writable_i)
 
   // Dummy instructions may only write to register 0, which is a special register when dummy
   // instructions are enabled.