diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json index eceb9239c7..20084f8033 100644 --- a/CI/build/conf/cores_config.json +++ b/CI/build/conf/cores_config.json @@ -66,6 +66,11 @@ "GENERIC_C552RETX", "GENERIC_C552RETXJ", "GENERIC_C562RETX", + "GENERIC_C593CETX", + "GENERIC_C593CEUX", + "GENERIC_C593CGTX", + "GENERIC_C593CGUX", + "GENERIC_C5A3CGTX", "GENERIC_F031C4TX", "GENERIC_F031E6YX", "GENERIC_F031F4PX", diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json index 0f8dcbaa80..d26d3a995e 100644 --- a/CI/build/conf/cores_config_ci.json +++ b/CI/build/conf/cores_config_ci.json @@ -66,6 +66,11 @@ "GENERIC_C552RETX", "GENERIC_C552RETXJ", "GENERIC_C562RETX", + "GENERIC_C593CETX", + "GENERIC_C593CEUX", + "GENERIC_C593CGTX", + "GENERIC_C593CGUX", + "GENERIC_C5A3CGTX", "GENERIC_F031C4TX", "GENERIC_F031E6YX", "GENERIC_F031F4PX", diff --git a/boards.txt b/boards.txt index 47a452a2c9..de887f6823 100644 --- a/boards.txt +++ b/boards.txt @@ -2532,6 +2532,60 @@ GenC5.menu.pnum.GENERIC_C562RETX.build.product_line=STM32C562xx GenC5.menu.pnum.GENERIC_C562RETX.build.variant=STM32C5xx/C552R(C-E)Tx(J)_C562RETx(J) GenC5.menu.pnum.GENERIC_C562RETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C562.svd +# Generic C593CETx +GenC5.menu.pnum.GENERIC_C593CETX=Generic C593CETx +GenC5.menu.pnum.GENERIC_C593CETX.upload.maximum_size=524288 +GenC5.menu.pnum.GENERIC_C593CETX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C593CETX.build.board=GENERIC_C593CETX +GenC5.menu.pnum.GENERIC_C593CETX.build.product_line=STM32C593xx +GenC5.menu.pnum.GENERIC_C593CETX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C593CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C593.svd + +# Generic C593CEUx +GenC5.menu.pnum.GENERIC_C593CEUX=Generic C593CEUx +GenC5.menu.pnum.GENERIC_C593CEUX.upload.maximum_size=524288 +GenC5.menu.pnum.GENERIC_C593CEUX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C593CEUX.build.board=GENERIC_C593CEUX +GenC5.menu.pnum.GENERIC_C593CEUX.build.product_line=STM32C593xx +GenC5.menu.pnum.GENERIC_C593CEUX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C593CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C593.svd + +# Generic C593CGTx +GenC5.menu.pnum.GENERIC_C593CGTX=Generic C593CGTx +GenC5.menu.pnum.GENERIC_C593CGTX.upload.maximum_size=1048576 +GenC5.menu.pnum.GENERIC_C593CGTX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C593CGTX.build.board=GENERIC_C593CGTX +GenC5.menu.pnum.GENERIC_C593CGTX.build.product_line=STM32C593xx +GenC5.menu.pnum.GENERIC_C593CGTX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C593CGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C593.svd + +# Generic C593CGUx +GenC5.menu.pnum.GENERIC_C593CGUX=Generic C593CGUx +GenC5.menu.pnum.GENERIC_C593CGUX.upload.maximum_size=1048576 +GenC5.menu.pnum.GENERIC_C593CGUX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C593CGUX.build.board=GENERIC_C593CGUX +GenC5.menu.pnum.GENERIC_C593CGUX.build.product_line=STM32C593xx +GenC5.menu.pnum.GENERIC_C593CGUX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C593CGUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C593.svd + +# Generic C5A3CGTx +GenC5.menu.pnum.GENERIC_C5A3CGTX=Generic C5A3CGTx +GenC5.menu.pnum.GENERIC_C5A3CGTX.upload.maximum_size=1048576 +GenC5.menu.pnum.GENERIC_C5A3CGTX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C5A3CGTX.build.board=GENERIC_C5A3CGTX +GenC5.menu.pnum.GENERIC_C5A3CGTX.build.product_line=STM32C5A3xx +GenC5.menu.pnum.GENERIC_C5A3CGTX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C5A3CGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5A3.svd + +# Generic C5A3CGUx +GenC5.menu.pnum.GENERIC_C5A3CGUX=Generic C5A3CGUx +GenC5.menu.pnum.GENERIC_C5A3CGUX.upload.maximum_size=1048576 +GenC5.menu.pnum.GENERIC_C5A3CGUX.upload.maximum_data_size=262144 +GenC5.menu.pnum.GENERIC_C5A3CGUX.build.board=GENERIC_C5A3CGUX +GenC5.menu.pnum.GENERIC_C5A3CGUX.build.product_line=STM32C5A3xx +GenC5.menu.pnum.GENERIC_C5A3CGUX.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U) +GenC5.menu.pnum.GENERIC_C5A3CGUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5A3.svd + # Upload menu GenC5.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) GenC5.menu.upload_method.swdMethod.upload.protocol=swd diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index e7366435d1..81ea7f3108 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -9067,6 +9067,414 @@ add_library(GENERIC_C562RETX_usb_none INTERFACE) target_compile_options(GENERIC_C562RETX_usb_none INTERFACE ) +# GENERIC_C593CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_C593CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C593CETX_MAXSIZE 524288) +set(GENERIC_C593CETX_MAXDATASIZE 262144) +set(GENERIC_C593CETX_MCU cortex-m33) +set(GENERIC_C593CETX_FPCONF "-") +add_library(GENERIC_C593CETX INTERFACE) +target_compile_options(GENERIC_C593CETX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C593xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CETX_MCU} +) +target_compile_definitions(GENERIC_C593CETX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C593CETX" + "BOARD_NAME=\"GENERIC_C593CETX\"" + "BOARD_ID=GENERIC_C593CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C593CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C593CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_C593CETX INTERFACE + "LINKER:--default-script=${GENERIC_C593CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CETX_MCU} +) + +add_library(GENERIC_C593CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C593CETX_serial_disabled INTERFACE +) +add_library(GENERIC_C593CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_C593CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C593CETX_serial_none INTERFACE) +target_compile_options(GENERIC_C593CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C593CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C593CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C593CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C593CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C593CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_C593CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C593CETX_usb_none INTERFACE) +target_compile_options(GENERIC_C593CETX_usb_none INTERFACE +) + +# GENERIC_C593CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_C593CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C593CEUX_MAXSIZE 524288) +set(GENERIC_C593CEUX_MAXDATASIZE 262144) +set(GENERIC_C593CEUX_MCU cortex-m33) +set(GENERIC_C593CEUX_FPCONF "-") +add_library(GENERIC_C593CEUX INTERFACE) +target_compile_options(GENERIC_C593CEUX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C593xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CEUX_MCU} +) +target_compile_definitions(GENERIC_C593CEUX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C593CEUX" + "BOARD_NAME=\"GENERIC_C593CEUX\"" + "BOARD_ID=GENERIC_C593CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C593CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C593CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_C593CEUX INTERFACE + "LINKER:--default-script=${GENERIC_C593CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CEUX_MCU} +) + +add_library(GENERIC_C593CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C593CEUX_serial_disabled INTERFACE +) +add_library(GENERIC_C593CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_C593CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C593CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_C593CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C593CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C593CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C593CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C593CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C593CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_C593CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C593CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_C593CEUX_usb_none INTERFACE +) + +# GENERIC_C593CGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_C593CGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C593CGTX_MAXSIZE 1048576) +set(GENERIC_C593CGTX_MAXDATASIZE 262144) +set(GENERIC_C593CGTX_MCU cortex-m33) +set(GENERIC_C593CGTX_FPCONF "-") +add_library(GENERIC_C593CGTX INTERFACE) +target_compile_options(GENERIC_C593CGTX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C593xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CGTX_MCU} +) +target_compile_definitions(GENERIC_C593CGTX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C593CGTX" + "BOARD_NAME=\"GENERIC_C593CGTX\"" + "BOARD_ID=GENERIC_C593CGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C593CGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C593CGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_C593CGTX INTERFACE + "LINKER:--default-script=${GENERIC_C593CGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CGTX_MCU} +) + +add_library(GENERIC_C593CGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C593CGTX_serial_disabled INTERFACE +) +add_library(GENERIC_C593CGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_C593CGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C593CGTX_serial_none INTERFACE) +target_compile_options(GENERIC_C593CGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C593CGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C593CGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C593CGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C593CGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C593CGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_C593CGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C593CGTX_usb_none INTERFACE) +target_compile_options(GENERIC_C593CGTX_usb_none INTERFACE +) + +# GENERIC_C593CGUX +# ----------------------------------------------------------------------------- + +set(GENERIC_C593CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C593CGUX_MAXSIZE 1048576) +set(GENERIC_C593CGUX_MAXDATASIZE 262144) +set(GENERIC_C593CGUX_MCU cortex-m33) +set(GENERIC_C593CGUX_FPCONF "-") +add_library(GENERIC_C593CGUX INTERFACE) +target_compile_options(GENERIC_C593CGUX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C593xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CGUX_MCU} +) +target_compile_definitions(GENERIC_C593CGUX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C593CGUX" + "BOARD_NAME=\"GENERIC_C593CGUX\"" + "BOARD_ID=GENERIC_C593CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C593CGUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C593CGUX_VARIANT_PATH} +) + +target_link_options(GENERIC_C593CGUX INTERFACE + "LINKER:--default-script=${GENERIC_C593CGUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C593CGUX_MCU} +) + +add_library(GENERIC_C593CGUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C593CGUX_serial_disabled INTERFACE +) +add_library(GENERIC_C593CGUX_serial_generic INTERFACE) +target_compile_options(GENERIC_C593CGUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C593CGUX_serial_none INTERFACE) +target_compile_options(GENERIC_C593CGUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C593CGUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C593CGUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C593CGUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C593CGUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C593CGUX_usb_HID INTERFACE) +target_compile_options(GENERIC_C593CGUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C593CGUX_usb_none INTERFACE) +target_compile_options(GENERIC_C593CGUX_usb_none INTERFACE +) + +# GENERIC_C5A3CGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_C5A3CGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C5A3CGTX_MAXSIZE 1048576) +set(GENERIC_C5A3CGTX_MAXDATASIZE 262144) +set(GENERIC_C5A3CGTX_MCU cortex-m33) +set(GENERIC_C5A3CGTX_FPCONF "-") +add_library(GENERIC_C5A3CGTX INTERFACE) +target_compile_options(GENERIC_C5A3CGTX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C5A3xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C5A3CGTX_MCU} +) +target_compile_definitions(GENERIC_C5A3CGTX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C5A3CGTX" + "BOARD_NAME=\"GENERIC_C5A3CGTX\"" + "BOARD_ID=GENERIC_C5A3CGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C5A3CGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C5A3CGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_C5A3CGTX INTERFACE + "LINKER:--default-script=${GENERIC_C5A3CGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C5A3CGTX_MCU} +) + +add_library(GENERIC_C5A3CGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_serial_disabled INTERFACE +) +add_library(GENERIC_C5A3CGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C5A3CGTX_serial_none INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C5A3CGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C5A3CGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C5A3CGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C5A3CGTX_usb_none INTERFACE) +target_compile_options(GENERIC_C5A3CGTX_usb_none INTERFACE +) + +# GENERIC_C5A3CGUX +# ----------------------------------------------------------------------------- + +set(GENERIC_C5A3CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)") +set(GENERIC_C5A3CGUX_MAXSIZE 1048576) +set(GENERIC_C5A3CGUX_MAXDATASIZE 262144) +set(GENERIC_C5A3CGUX_MCU cortex-m33) +set(GENERIC_C5A3CGUX_FPCONF "-") +add_library(GENERIC_C5A3CGUX INTERFACE) +target_compile_options(GENERIC_C5A3CGUX INTERFACE + "SHELL:-DUSE_HALV2_DRIVER" + "SHELL:-DSTM32C5A3xx" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C5A3CGUX_MCU} +) +target_compile_definitions(GENERIC_C5A3CGUX INTERFACE + "STM32C5xx" + "ARDUINO_GENERIC_C5A3CGUX" + "BOARD_NAME=\"GENERIC_C5A3CGUX\"" + "BOARD_ID=GENERIC_C5A3CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C5A3CGUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/ + ${GENERIC_C5A3CGUX_VARIANT_PATH} +) + +target_link_options(GENERIC_C5A3CGUX INTERFACE + "LINKER:--default-script=${GENERIC_C5A3CGUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_C5A3CGUX_MCU} +) + +add_library(GENERIC_C5A3CGUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_serial_disabled INTERFACE +) +add_library(GENERIC_C5A3CGUX_serial_generic INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C5A3CGUX_serial_none INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C5A3CGUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C5A3CGUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C5A3CGUX_usb_HID INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C5A3CGUX_usb_none INTERFACE) +target_compile_options(GENERIC_C5A3CGUX_usb_none INTERFACE +) + # GENERIC_F030C6TX # ----------------------------------------------------------------------------- diff --git a/docs/supported-boards/index.md b/docs/supported-boards/index.md index 606b734b9c..6d0063aaf7 100644 --- a/docs/supported-boards/index.md +++ b/docs/supported-boards/index.md @@ -184,6 +184,12 @@ | Generic C552RCTx | [STM32C552RC](https://www.st.com/en/microcontrollers-microprocessors/stm32c552rc.html) | `GENERIC_C552RCTX` | 3.0.0 | | | Generic C552RETx | [STM32C552RE](https://www.st.com/en/microcontrollers-microprocessors/stm32c552re.html) | `GENERIC_C552RETX` | 3.0.0 | | | Generic C562RETx | [STM32C562RE](https://www.st.com/en/microcontrollers-microprocessors/stm32c562re.html) | `GENERIC_C562RETX` | 3.0.0 | | +| Generic C593CETx | [STM32C593CE](https://www.st.com/en/microcontrollers-microprocessors/stm32c593ce.html) | `GENERIC_C593CETX` | Next release | | +| Generic C593CEUx | [STM32C593CE](https://www.st.com/en/microcontrollers-microprocessors/stm32c593ce.html) | `GENERIC_C593CEUX` | Next release | | +| Generic C593CGTx | [STM32C593CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c593cg.html) | `GENERIC_C593CGTX` | Next release | | +| Generic C593CGUx | [STM32C593CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c593cg.html) | `GENERIC_C593CGUX` | Next release | | +| Generic C5A3CGTx | [STM32C5A3CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c5a3cg.html) | `GENERIC_C5A3CGTX` | Next release | | +| Generic C5A3CGUx | [STM32C5A3CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c5a3cg.html) | `GENERIC_C5A3CGUX` | Next release | | ### Generic STM32F0 series boards diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/CMakeLists.txt b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/CMakeLists.txt index 2a4d55b6b1..25985cba99 100644 --- a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/CMakeLists.txt +++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/CMakeLists.txt @@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c variant_generic.cpp + variant_XIAO_STM32C5.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/generic_clock.c b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/generic_clock.c index f5367aaf07..323b147dea 100644 --- a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/generic_clock.c +++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/generic_clock.c @@ -20,8 +20,50 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + if (HAL_RCC_HSIS_Enable() != HAL_OK) { + Error_Handler(); + } + + hal_rcc_psi_config_t config_psi; + config_psi.psi_source = HAL_RCC_PSI_SRC_HSI_8MHz; + config_psi.psi_ref = HAL_RCC_PSI_REF_8MHZ; + config_psi.psi_out = HAL_RCC_PSI_OUT_144MHZ; + if (HAL_RCC_PSI_SetConfig(&config_psi) != HAL_OK) { + Error_Handler(); + } + + if (HAL_RCC_PSIS_Enable() != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB busses clocks */ + hal_rcc_bus_clk_config_t config_bus; + config_bus.hclk_prescaler = HAL_RCC_HCLK_PRESCALER1; + config_bus.pclk1_prescaler = HAL_RCC_PCLK_PRESCALER1; + config_bus.pclk2_prescaler = HAL_RCC_PCLK_PRESCALER1; + config_bus.pclk3_prescaler = HAL_RCC_PCLK_PRESCALER4; + if (HAL_RCC_SetBusClockConfig(&config_bus) != HAL_OK) { + Error_Handler(); + } + + /** Frequency will be increased */ + HAL_FLASH_ITF_SetLatency(HAL_FLASH, HAL_FLASH_ITF_LATENCY_4); + + if (HAL_RCC_SetSYSCLKSource(HAL_RCC_SYSCLK_SRC_PSIS) != HAL_OK) { + Error_Handler(); + } + + HAL_FLASH_ITF_SetProgrammingDelay(HAL_FLASH, HAL_FLASH_ITF_PROGRAM_DELAY_2); + + if (HAL_UpdateCoreClock() != HAL_OK) { + Error_Handler(); + } + if (HAL_RCC_HSIDIV3_Enable() != HAL_OK) { + Error_Handler(); + } + if (HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_HSIDIV3) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript.ld b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript.ld new file mode 100644 index 0000000000..970aeba2ae --- /dev/null +++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript.ld @@ -0,0 +1,185 @@ +/** +****************************************************************************** +* @file stm32c5a3xg_flash.ld +* @brief Linker File +****************************************************************************** +* @attention +* +* Copyright (c) 2026 STMicroelectronics. +* All rights reserved. +* +* This software is licensed under terms that can be found in the LICENSE file +* in the root directory of this software component. +* If no LICENSE file comes with this software, it is provided AS-IS. +* +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = 0x2000; +STACK_SIZE = 0x2000; + + +MEMORY +{ + ROM (rx) : org = 0x8000000 + LD_FLASH_OFFSET, len = LD_MAX_SIZE - LD_FLASH_OFFSET + RAM (xrw) : org = 0x20000000, len = LD_MAX_DATA_SIZE +} + +SECTIONS +{ + .vectors : + { + . = ALIGN(8); + KEEP(*(.vectors)); + . = ALIGN(8); + } > ROM + + .text : + { + . = ALIGN(8); + *(.text); + *(.text*); + *(.glue_7); + *(.glue_7t); + *(.eh_frame); + KEEP (*(.init)); + KEEP (*(.fini)); + . = ALIGN(8); + _etext = .; + } > ROM + + .rodata : + { + . = ALIGN(8); + *(.rodata); + *(.rodata*); + . = ALIGN(8); + } > ROM + + .ARM.extab (READONLY) : + { + . = ALIGN(8); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(8); + } > ROM + + .ARM (READONLY) : + { + . = ALIGN(8); + __exidx_start = .; + *(.ARM.exidx*); + __exidx_end = .; + . = ALIGN(8); + } > ROM + + .preinit_array (READONLY) : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)); + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(8); + } > ROM + + .init_array (READONLY) : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))); + KEEP (*(.init_array*)); + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(8); + } > ROM + + .fini_array (READONLY) : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))); + KEEP (*(.fini_array*)); + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(8); + } > ROM + + .copy.table (READONLY) : + { + . = ALIGN(8); + __copy_table_start__ = .; + LONG(LOADADDR(.data)); + LONG (ADDR(.data)); + LONG (SIZEOF(.data) / 4); + __copy_table_end__ = .; + } > ROM + + .zero.table (READONLY) : + { + . = ALIGN(8); + __zero_table_start__ = .; + LONG (ADDR(.bss)); + LONG (SIZEOF(.bss) / 4); + __zero_table_end__ = .; + } > ROM + + .data : + { + . = ALIGN(8); + _sidata = LOADADDR(.data); + __data_start__ = .; + _sdata = .; + *(.data); + *(.data*); + . = ALIGN(8); + _edata = .; + } > RAM AT> ROM + + .bss : + { + . = ALIGN(8); + _sbss = .; + __bss_start__ = _sbss; + *(.bss); + *(.bss*); + *(COMMON); + . = ALIGN(8); + _ebss = .; + __bss_end__ = _ebss; + } > RAM + + .heap (NOLOAD) : + { + . = ALIGN(8); + __end__ = .; + PROVIDE (end = .); + _heap_start = .; + . += HEAP_SIZE; + . = ALIGN(8); + _heap_end = .; + __HeapLimit = .; + } > RAM + + .stack (NOLOAD) : + { + . = ALIGN(8); + __StackLimit = .; + . += STACK_SIZE; + . = ALIGN(8); + __StackTop = .; + _estack = .; + __stack = .; + } > RAM + + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : + { + *(.ARM.attributes) + } +}