From 02278188c0df58b7c53cdcae97c1e937c8616aca Mon Sep 17 00:00:00 2001 From: Andrej Picej Date: Tue, 10 Nov 2026 06:42:17 +0100 Subject: [PATCH 1/3] west.yml: update zephyr to 25851fa15cdc Update Zephyr to 25851fa15cdc2dc9c395807bce97fa81c46c10ee to bring in the phyboard_pollux/mimx8ml8/adsp board (PHYTEC phyBOARD-Pollux audio DSP) and the SAI2 node of the i.MX8M DSP. Total of 229 commits. Changes include: 25851fa15cdc boards: phytec: phyboard_pollux: add audio DSP support dd6e0849c021 dts: xtensa: nxp_imx8m: add SAI2 node 8bb459acace3 arch: xtensa: Extend small vector table workaround to User vector 0fc343dedfbe xtensa: coredump: collect extra exception registers b9fad655eae2 arch: xtensa: mpu: Allow user access to gcov bss sections Signed-off-by: Andrej Picej --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index 3200fc166e1c..a3bf4f93c3f2 100644 --- a/west.yml +++ b/west.yml @@ -87,7 +87,7 @@ manifest: - name: zephyr repo-path: zephyr - revision: 76f604468505b30dfafa2c5a80d8b1c665ed6633 + revision: 25851fa15cdc2dc9c395807bce97fa81c46c10ee remote: zephyrproject # Import some projects listed in zephyr/west.yml@revision From 981172ca821079858fcb63578fe123ca5234efb6 Mon Sep 17 00:00:00 2001 From: Andrej Picej Date: Tue, 27 Oct 2026 12:09:43 +0100 Subject: [PATCH 2/3] topology: imx: Add topology for i.MX8MP with TLV320 codec Add the TLV320AIC3007 codec to the shared i.MX8 topology and build sof-imx8mp-tlv320.tplg from it, for the PHYTEC phyBOARD-Pollux with the PEB-AV-10 expansion board, where the codec is connected to SAI2. sof-imx8-wm8960.m4 is the common i.MX8 topology despite its name: only the stream name and the SAI clock setup depend on CODEC, as for wm8962 and wm8904, see commit 67fa702308dd ("topology: imx: Combine base topology files for i.MX8MP and i.MX8"). Unlike the Wolfson codecs, the TLV320 is the clock consumer: the SAI provides BCLK and the frame sync, and MCLK at 12.288 MHz. The DAI link is named sai2-tlv320. Also list wm8904 in the header, which was already supported. Signed-off-by: Andrej Picej --- tools/topology/topology1/CMakeLists.txt | 1 + tools/topology/topology1/sof-imx8-wm8960.m4 | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/tools/topology/topology1/CMakeLists.txt b/tools/topology/topology1/CMakeLists.txt index e78a7c2e25ff..1d31c0bf7e94 100644 --- a/tools/topology/topology1/CMakeLists.txt +++ b/tools/topology/topology1/CMakeLists.txt @@ -59,6 +59,7 @@ set(TPLGS "sof-imx8-wm8960\;sof-imx8mp-eap-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eap\;-DSAI_INDEX=3" "sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3" "sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-tlv320\;-DCODEC=tlv320\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=2" "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3" "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3" "sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3" diff --git a/tools/topology/topology1/sof-imx8-wm8960.m4 b/tools/topology/topology1/sof-imx8-wm8960.m4 index 289493cf7bda..4ef19a908671 100644 --- a/tools/topology/topology1/sof-imx8-wm8960.m4 +++ b/tools/topology/topology1/sof-imx8-wm8960.m4 @@ -1,7 +1,7 @@ # # Topology for i.MX8QM/i.MX8QXP/i.MX8MP board with 'CODEC' codec # -# CODEC: wm8960, wm8962 +# CODEC: wm8960, wm8962, wm8904, tlv320 (tlv320aic3007) # # Include topology builder @@ -57,6 +57,7 @@ define(`STREAM_NAME', `ifelse(CODEC, `wm8960', `-wm8960-hifi', CODEC, `wm8904', `-wm8904-hifi', CODEC, `wm8962', `-wm8962', + CODEC, `tlv320', `-tlv320', `fatal_error(`Codec not supported.')')') # define DAI BE dai_link name @@ -108,4 +109,10 @@ ifelse( SAI_CLOCK(fsync, RATE, codec_provider), SAI_TDM(2, 32, 3, 3), SAI_CONFIG_DATA(SAI, SAI_INDEX, 0)))', + CODEC, `tlv320', ` + SAI_CONFIG(I2S, SAI_CLOCK(mclk, 12288000, codec_mclk_in), + SAI_CLOCK(bclk, 3072000, codec_consumer), + SAI_CLOCK(fsync, RATE, codec_consumer), + SAI_TDM(2, 32, 3, 3), + SAI_CONFIG_DATA(SAI, SAI_INDEX, 0)))', ) From 1fac649d738fcd191d9441d35dfeeeeb84bbaf83 Mon Sep 17 00:00:00 2001 From: Andrej Picej Date: Tue, 27 Oct 2026 12:11:09 +0100 Subject: [PATCH 3/3] app: boards: Add phyBOARD-Pollux i.MX8MP audio DSP Add the configuration and devicetree overlay for the phyboard_pollux/mimx8ml8/adsp Zephyr board, the HiFi 4 audio DSP of the PHYTEC phyBOARD-Pollux. The configuration is the one of the i.MX8MP EVK without the MICFIL DAI, as the board has no PDM microphones. The overlay enables SAI2, which is on the expansion connector and used by the TLV320 codec of the PEB-AV-10 expansion board. As on that board the frame sync is only routed on SAI2_RXFS, the transmitter runs synchronous to the receiver. Build with: west build -b phyboard_pollux/mimx8ml8/adsp sof/app Signed-off-by: Andrej Picej --- app/boards/phyboard_pollux_mimx8ml8_adsp.conf | 11 ++++++++ .../phyboard_pollux_mimx8ml8_adsp.overlay | 27 +++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 app/boards/phyboard_pollux_mimx8ml8_adsp.conf create mode 100644 app/boards/phyboard_pollux_mimx8ml8_adsp.overlay diff --git a/app/boards/phyboard_pollux_mimx8ml8_adsp.conf b/app/boards/phyboard_pollux_mimx8ml8_adsp.conf new file mode 100644 index 000000000000..f1ed34f8dc99 --- /dev/null +++ b/app/boards/phyboard_pollux_mimx8ml8_adsp.conf @@ -0,0 +1,11 @@ +CONFIG_IMX8M=y +CONFIG_HAVE_AGENT=n +CONFIG_FORMAT_CONVERT_HIFI3=n +CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n +CONFIG_DMA=y +CONFIG_DMA_NXP_SDMA=y +CONFIG_TRACE=n +CONFIG_SHARED_INTERRUPTS=y +CONFIG_ZEPHYR_NATIVE_DRIVERS=y +CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y +CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y diff --git a/app/boards/phyboard_pollux_mimx8ml8_adsp.overlay b/app/boards/phyboard_pollux_mimx8ml8_adsp.overlay new file mode 100644 index 000000000000..257c97557e30 --- /dev/null +++ b/app/boards/phyboard_pollux_mimx8ml8_adsp.overlay @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2026 PHYTEC Messtechnik GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + host_dma: dma { + compatible = "nxp,sof-host-dma"; + dma-channels = <32>; + #dma-cells = <0>; + }; +}; + +&sdma3 { + status = "okay"; +}; + +/* SAI2 on the expansion connector, e.g. TLV320 codec on the PEB-AV-10 */ +&sai2 { + rx-fifo-watermark = <65>; + tx-fifo-watermark = <65>; + fifo-depth = <128>; + /* Rx provides BCLK/FS, the frame sync is only routed on SAI2_RXFS */ + tx-sync-mode = <1>; + status = "okay"; +};