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research: point-source CPU phase 4c — MAX_CONTAINING_SIZE headroom A/B (PyAutoArray#583) - #335
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…config_sweep (phase 4c) --mcs-headroom runs control (library MCS 15) + mcs18/mcs20/mcs24 at the production geometry; --configs narrows it, and the default 4a grid is unchanged. Adds per-step uncapped NumPy containing counts on the prior, stress and stream draws with per-MCS draws exceeding the cap at every step, the mcs_no_unexplained_change gate (a row may differ from the control only where the control's cap was truncating), and a probe that the __defaults__ patch binds by name (step0_layout=None kept). Adds the RAL 8490H submit with a measured-wall WALL-BASIS row. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
… MCS gate The first laptop witness flagged one stream gradient differing from the control by 3e-15 relative at all three caps, with log L bit-identical: the backward pass accumulates over the padded (MCS, ...) axis, so the padded length changes XLA's reduction order. Such changes are now listed with max_rel_delta_vs_control and an explicit explanation instead of failing the gate. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…scope the rounding allowance The GRAD_ROUNDING_RTOL allowance applies only to MCS rows (padded (mcs, 2) shape change reorders the backward sum) and only with log L bit-identical; step-0 route rows and the control stay strictly bit-identical. A log L difference is only ever an explained (truncation) change, never a tolerance. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…ot quotable) control (MCS 15) vs 18/20/24, 200 prior + 200 stress draws, 20 x 20: all_gates_pass true; fiducial 7.743201200876812 bit-identical at every cap; no image-set change on any draw. Uncapped prior max per step [17, 13, 11, 9, 7, 5, 5, 5]; only prior draw 12 exceeds 15 (step 0, 17), and its positions and log L are bit-identical at every cap. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…hase 4c) euclid-ral-compute-10-4, 8 CPUs, loadavg ~206-210 (236 cores), wall 397 s, all_gates_pass true, provenance asserted (mirror PyAutoArray e281abf3, includes #580). Control 1.466 ms; row/control median mcs18 1.050, mcs20 1.062, mcs24 1.090; compile +4.5 / +7.0 / +14.4 %. Zero image-set, position or log L changes on 200 prior + 200 stress + 16 stream draws; fiducial 7.743201200876812 bit-identical at every cap; two gradient instances differ by <= 6.1e-14 relative (padded-length reduction order). Uncapped max per step [17, 13, 11, 9, 7, 5, 5, 5]; only prior draw 12 exceeds 15 (step 0). Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
--mcs-headroom --configs control,mcs20 on the RAL A100 against the shared mirror (MAX_CONTAINING_SIZE 15 is the control; 20 is the traced patch, so no library branch is needed). JAX_PLATFORMS=cuda + JAX_PLATFORM_NAME=cuda, backend asserted gpu. WALL-BASIS: measured-wall 432 s (phase-4b A100 job 357322), headroom 3. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…2 (phase 4c) euclid-ral-gpu-1 A100 80 GB, JAX_PLATFORMS=cuda + JAX_PLATFORM_NAME=cuda, mirror libraries (PyAutoArray e281abf3, MCS 15 control), wall 270 s, all_gates_pass true. mcs20 / control median 0.997 (control/row 1.003 [0.999, 1.005]), vmap-16 flat, compile +3.2 %; fiducial 7.743201200876806 bit-identical; zero image-set changes; max gradient rel delta 1.98e-14 (padded-length rounding, log L bit-identical). Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
RAL 8490H quotable table (job 358976, loaded node, ratios valid), laptop witness, A100 row (job 359102), completeness and per-step uncapped counts (max 17, prior draw 12 step 0, explained), the scoped gradient allowance (1e-12, observed max 6.08e-14), fiducial bit-identical, the human decision N = 20 at +6.2 % (cost-leg miss accepted), suites, pins, the 31/31 targeted smoke and the revisions. Refs PyAutoLabs/PyAutoArray#583 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…4a, not re-verified Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Summary
Phase 4c data for the point-source CPU campaign (PyAutoArray#583): the measured A/B behind raising
MAX_CONTAINING_SIZEfrom 15 to 20. The human chose N = 20 for 3 triangles of headroom over the observed maximum of 17, accepting a scalar cost of about 6 %, just over the ~5 % budget.RAL 8490H, job 358976 (quotable; loaded node, loadavg ~207, so compare the ratios):
Scripts Changed
scripts/point_source_image/likelihood_breakdown/solver_config_sweep.py:--mcs-headroompreset (control + mcs18/20/24) and a--configsselection. The default grid is unchanged.mcs_no_unexplained_change, and a probe that the__defaults__patch keepsstep0_layout=None.hpc/batch_cpu/…_solver_config_sweep_mcs_ral_cpu_fp64andhpc/batch_gpu/…_solver_config_sweep_mcs_a100_fp64: new RAL submits withmeasured-wallWALL-BASIS rows.check_submits.py --checkpasses.results/breakdown/point_source_image/solver_config_sweep_mcs_{hpc_ral_cpu,hpc_ral_a100,laptop_cpu}_fp64.{json,png}and the two RAL job logs.results/notes/point_source_cpu_campaign.md: a Phase 4c section.Upstream PR
PyAutoLabs/PyAutoArray#584 (plus the companion PyAutoLabs/PyAutoLens#753)
Test Plan
all_gates_pass: trueon all three.build_readme.py --checkandcheck_submits.py --checkare clean, and there are no local paths in any artefact.Part of PyAutoLabs/PyAutoArray#583.
Generated by the PyAutoLabs agent workflow.
🤖 Generated with Claude Code