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displayif: mipidsi drives MIPI DSI panels on the STM32H747 - #265

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bdbarnett merged 2 commits into
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displayif-stm32-mipidsi
Nov 6, 2026
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bdbarnett merged 2 commits into
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displayif-stm32-mipidsi

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@bdbarnett bdbarnett commented Nov 6, 2026 •

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On the STM32H747 and H757, mipidsi is real now instead of a stub. Bus starts the DSI host's PLL and PHY; Display sets up video burst mode, starts the LTDC scanning an RGB565 framebuffer from the MicroPython heap, and sends the panel's init sequence, with the same keyword arguments as the esp32 module, so a board config reads the same and displaydev's FBDisplay drives it. The LTDC reads the framebuffer continuously, so refresh(), blit() and fill_rect() only write the CPU's dirty cache lines back. The pixel clock is set with PLL3's R divider alone, so SPI1/2/3 keep their clock; the ADC's, also PLL3 R, follows the pixel clock while a display is up, and deinit and soft reset put the divider back. The board has to enable the HAL's DSI and LTDC drivers; the port notes say how, and the GIGA R1 variant in #266 does it. mipidsi.pyi is new: a stub for the module on both ports, marking what only one of them has.

Tested on an Arduino GIGA R1 WiFi with the GIGA Display Shield (480x800 ST7701S, two lanes at 500 Mbit/s, 40 MHz pixel clock). Register reads while it ran showed the DSI PLL locked, no DSI errors and no LTDC underruns. Eight colour bars filled in 5 ms, and then LVGL ran through FBDisplay with the shield's GT911 touch for 60 s: app.service fired 5776 times, refresh 1752, LVGL 5314, with no timer errors and a longest gap of 30 ms.

Not tested: a second panel, one data lane, deinit() followed by a new Display, and the H757.

On the H747 and H757, mipidsi now drives the chip's DSI host in video burst
mode, fed by the LTDC scanning an RGB565 framebuffer from the MicroPython
heap, with the same Bus and Display interface as on esp32. refresh(), blit()
and fill_rect() write the CPU's dirty cache lines back to the memory the
LTDC reads. The pixel clock comes from PLL3's R divider alone, put back on
deinit and soft reset, so SPI1/2/3 keep their clock. Other stm32 chips keep
the stub.

The board has to enable the HAL's DSI and LTDC drivers. Tested on an
Arduino GIGA R1 WiFi with the GIGA Display Shield (480x800 ST7701S, two
lanes at 500 Mbit/s, 40 MHz pixel clock): colour bars, then LVGL through
displaydev's FBDisplay with the shield's GT911 touch, 60 s with no errors.
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bdbarnett merged commit b139f12 into main Nov 6, 2026
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bdbarnett deleted the displayif-stm32-mipidsi branch November 6, 2026 10:22
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