arch/arm/stm32f4: fudge STM32F411VE NGPIO so GPIOH is enabled - #20007
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STM32_NGPIO_PORTS is (N+15)>>4. 81 (the real pin count) yields six ports A-F, so PH0/PH1 cannot be configured. 113 matches the F40x 100-pin entries and gives A-H. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
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Found while adding STM32F412VG in #20006: the same
STM32_NGPIO 81/ "GPIOA-H" mismatch.Summary
Set STM32F411VE
STM32_NGPIOto 113 so GPIO ports A–H are enabled.Problem
STM32_NGPIO_PORTSis(N+15)>>4. 81 is the real pin count but yields six ports A–F, so PH0/PH1 cannot be configured and GPIOH clocks/registers are never set up.Solution
Use 113, matching the F40x 100-pin entries (F405VG/F407VG). That gives eight ports A–H. Enabling unused F/G clocks is harmless.