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fix(bit-timing): support extended hardware limits #2094
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a08da11
fix(bit-timing): support extended hardware limits
timothyanderson096-ocdealcheck d039d48
fix(bit-timing): preserve controller constraints
timothyanderson096-ocdealcheck 33a212a
fix(bit-timing): validate retained limits during clock recreation
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,2 @@ | ||
| Allow ``BitTiming.from_sample_point`` to find valid timings for CAN controllers with bit rate prescalers above 32. | ||
| Preserve controller limits when recreating timings at a different clock frequency. |
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How can this ever fail if you set
self._tseg1_max = max(16, tseg1)in the init method? Am i missing something?There was a problem hiding this comment.
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tseg1_maxin this check is the_validate()argument (default16), rather thanself._tseg1_max. The stored attributes retain limits for clock recreation; the sample-point factory replaces those fallback values with the caller's explicit controller limits. For example, constructing withtseg1=17, strict=Truestill raisesValueError, even though the stored fallback maximum is 17. I've added a regression for that case and clarified the comment.While checking this, I found a separate gap in the clock-recreation shortcut: a timing created at 8 MHz / 500 kbit/s with
brp_max=1could be recreated at 16 MHz withbrp=2. In33a212a, the shortcut validates against the retained controller limits before returning, then falls back to the bounded solver when necessary. The new regression rejects that case and accepts thebrp_max=2boundary control.Local validation on Python 3.14.10: 36 timing/util tests passed; configured lint and all five mypy targets (3.11–3.15) passed; Sphinx HTML and 39 doctests passed. Black used one worker for this environment. The three intentional internal-access annotations follow the existing convention in this file. Hosted CI is running on the new revision.
Timothy Anderson — Spotted Ridge Engineering / OC Labs · GDN (Global Decision Network)
timothyanderson096@gmail.com