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Speed up the decimal widening copy #10989
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I would check the lanezip (and related) these are written so they simd better. I think from_trusted_len_iter cannot quite avoid bounds check
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initial test shows that the lanezip is slower for i32->i64 on M4, am spinning up some EC2 instances to double check (and also ask why)
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Keeping the current loop in this PR: the bounds-check concern does not reproduce, and
map_intointroduces large regressions on ARM and AVX-512. The follow-up is to improvemap_into's tiling separately, since a diagnostic larger-tile run removes the ARM regression.Benchmark results and diagnostic experiment
Baseline is this PR at
d09193ef532c. The candidate replaces the trusted-iterator construction inwiden_valueswith the related unarymap_intohelper, keeping the cast and output allocation. Rust 1.99.1, LLVM 23.1.1, bench profile, 16 CGUs, no LTO, MiMalloc, 16,384 non-null values. Each result is the median paired candidate/baseline ratio from seven alternating pairs, with 300 samples and a 0.3-second minimum per case. Higher is slower. EC2 runs were pinned to CPU 2, with its SMT sibling disabled on C7i. The M4 runs were unpinned.i32 -> i64i64 -> i128i128 -> i256The C7i runs use the AVX2 and full AVX-512 feature sets from CI on the same Xeon Platinum 8488C. Graviton3 uses
+neonwithout SVE.For the
i32 -> i64diagnostic, separate interleaved three-way runs gave:map_into, 64-row tilesmap_into, 1024-row tilesThe 64-row body uses narrower loads and individual stores. A 128-row experiment restored wider paired operations but recovered only part of the slowdown. The 1024-row version restores a compact rolled vector loop with the same inner instruction sequence as the current implementation. Allocation and conversion work are unchanged. This isolates a lane-tiling/code-generation sensitivity, while the exact hardware bottleneck remains unresolved. A separate prototype keeps
map_intounchanged by default and adds an explicit widening opt-in: retain the tiled loop up to 128 values, then use one untiled loop. In six alternating pairs at 16,384 values, this reduces time against stockmap_intoby about 48% on M4 and 44% on Graviton3 fori32 -> i64, and 35% on C7i AVX-512 fori128 -> i256. AVX2 is roughly unchanged. Some short integer cases still cost about 1 ns more, floating-point results are mixed, and unchanged controls show placement sensitivity. That supports a selective follow-up, rather than replacing every map loop.