Skip to content

feat(cuda): add a FastLanes delta decode kernel - #9535

Open
joseph-isaacs wants to merge 2 commits into
developfrom
ji/cuda-delta-kernel
Open

feat(cuda): add a FastLanes delta decode kernel#9535
joseph-isaacs wants to merge 2 commits into
developfrom
ji/cuda-delta-kernel

Conversation

@joseph-isaacs

@joseph-isaacs joseph-isaacs commented Aug 21, 2026 •
edited
Loading

Copy link
Copy Markdown
Contributor

Rationale for this change

fastlanes.delta GPU kernels are missing

@claude
feat(cuda): add a FastLanes delta decode kernel
a91e43d 
vortex.onpair emits fastlanes.delta children, and decoding one on the GPU failed
with "No CUDA kernel for encoding Id(\"fastlanes.delta\")". Because the buffers
are device-resident by then, there is no CPU fallback: the whole decode fails.

Delta is not the sequential prefix sum it appears to be. FastLanes stores each
1024-element chunk as LANES independent columns, each with its own running total
seeded from that lane's base, so a chunk decodes as LANES independent scans and
the array is data-parallel across both chunks and lanes. One thread owns one
lane, mirroring how the CPU decoder uses one SIMD lane per column, and
fastlanes_common.cuh already carries the index math.

The kernel mirrors delta_decompress: undelta into the transposed layout staged in
shared memory, untranspose into natural order, then apply the logical slice.
Signed values decode through their unsigned counterpart, so the wrapping add
inverts the wrapping subtract done at compress time.

only_cuda_compatible() still excludes DeltaScheme: that preset chooses encodings
rather than merely decoding them, so flipping it should follow a benchmark of GPU
delta decode against the schemes it would displace. Its comment is updated, since
the "no GPU decode kernel" rationale no longer holds.

Signed-off-by: Joe Isaacs <joe.isaacs@live.co.uk>
@codspeed-hq

codspeed-hq Bot commented Aug 21, 2026 •
edited
Loading

Copy link
Copy Markdown

Merging this PR will not alter performance

⚠️ Unknown Walltime execution environment detected

Using the Walltime instrument on standard Hosted Runners will lead to inconsistent data.

For the most accurate results, we recommend using CodSpeed Macro Runners: bare-metal machines fine-tuned for performance measurement consistency.

✅ 2023 untouched benchmarks
⏩ 12 skipped benchmarks1
🗄️ 1 archived benchmark run2

Comparing ji/cuda-delta-kernel (811aba2) with develop (acc046b)

Open in CodSpeed

Footnotes

  1. 12 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

  2. 1 benchmark was run, but is now archived. If it was deleted in another branch, consider rebasing to remove it from the report. Instead if it was added back, click here to restore it. ↩

@claude
bench(cuda): measure FastLanes delta decode
811aba2 
The delta kernel had tests but no benchmark, so its throughput was unmeasured
and no regression would be caught.

Cover each element width separately: the lane count is 1024 / bit-width, so the
width sets both how a chunk splits — 128 lanes of 8 rows for u8 through 16 lanes
of 64 rows for u64 — and how much of a block is busy during the scan. The
CUDA CodSpeed shards enumerate their benches explicitly, so delta_cuda is added
to shard 3 alongside the other standalone kernels; without that the bench would
build but never run.

Signed-off-by: Joe Isaacs <joe.isaacs@live.co.uk>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

No reviews

Assignees

No one assigned

Labels

None yet

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

2 participants

@joseph-isaacs @claude